Design And Reuse SoC News Alert

September 21, 2004

Welcome to issue of September 21, 2004 of D&R SoC News Alert, our email update to provide you with the latest news and information in the System-On-Chip Community.

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CAN Bus Controller with Message Filter (Optimized for FPGA Implemetation) from Inicore, Inc.

DSP System Platform for Wireless and Digital Multimedia Applications from Ceva, Inc.

Low power, low cost, tile based rasterizer hardware IP Core solution targeting high performance battery powered devices such as media enabled mobile phones, PDAs and portable gaming units from Falanx Microsystems

Programmable Memory BIST Microcontroller from Mosaid Technologies

SafeXcel IP Content Inspection Engine, IP for Content Inspection Hardware Acceleration from SafeNet

USB 2.0 Device IP Core from ASICS World Services

Wanted IPs :

NTSC/PAL encoder

RS-485 Transceiver

Making SPI-4.2 Implementations More Efficient: Part 1

Making SPI-4.2 Implementations More Efficient: Part 2

FPGA design from the outside in

Flash memory market to continue growth, researcher finds

Nine reasons to adopt SystemC ESL design

Semico Research Cites Consumer Caution for Slowing 2005 Semiconductor Market

Verification IP complexity approaches design IP

IP/SOC PRODUCTS

Indian design house rolls IP verification suite

Faraday Introduces PCI Express IP Solutions

Faraday Introduces MPEG4/JPEG Multimedia Platform

New Linux Support for the ARC 700 Configurable Core

Faraday's USB 2.0 OTG High Speed IP Core Silicon Proven on UMC's 0.13 um Technology

Brand new 32-bit RISC core: XAP3 ASIC processor liberates embedded systems industry with very high code density, low power and software flexibility

Samsung Semiconductor offers SERDES Intellectual Property for high-speed ASIC designs

CISSOID releases its High-temperature LDO Voltage Regulator Family (CHT-LDO)

Imagination Technologies, a leader in system-on-chip intellectual property (IP), announces new IP for DVB-Handheld (DVB-H)

STRUCTURED ASIC

Faraday Uncovers New TEMPLATE Family That Achieves 0.13um Performance at 0.25um Production Cost

Magma and ChipX Team to Deliver Unified RTL-to-GDSII Design Flow for Structured ASIC Platforms

DEALS

NemeriX Licenses CEVA GPS 4000 IP And Announces Assisted GPS Chipset Targeting Mobile Phone Market

Zeevo choose LTRIM Power Management IP

Daewoo Selects LSI Logic Dimension Processor for DVD/VCR Recorder Product Line

SK Teletech licenses TTPCom's GPRS software and Ajar Platform

Japan Radio Co. Licenses CEVA-Teak DSP Core For Baseband Radio Communications

4i2i, an Aberdeen technology company, takes leap into space after securing deal with NASA

BUSINESS

Broadcom Acquires Alphamosaic Limited, a Leading Developer of Mobile Multimedia Processors for Cellular Phones

The Fabless Semiconductor Association (FSA) announces 44 Percent YoY Worldwide Fabless Revenue Growth in Q2 2004

Philips And Xilinx Collaborate In Design Of Low Cost PCI Express Solutions

MindTree sees increased demand for Bluetooth integration into semiconductor chips

Open-source cores to aid in system design

FINANCIAL RESULTS

Xilinx Business Update for September Quarter Fiscal 2005

PEOPLE

Monolithic System Technology, Inc. Strengthens Executive Team; Appoints Karen Lamar as Vice President of Sales and Marketing

DESIGN SERVICES

Accent Joins TSMC's Design Center Alliance

Outsourcing to India shifts to R&D

EMBEDDED SYSTEMS

NEC Electronics Launches Industry's First High-Quality, One Chip Video Decoder

Tharas Systems Awarded Key Patents on Hardware-Assisted Verification Technology

Nazomi and CoreTek Announce High Performance Java and Multimedia Platform Solution for China's Mobile Phones

FOUNDRIES

Chartered pushing 65 nm ahead

UMC Expands Embedded Memory Portfolio to Target Fast Growing Smart Card Market

TSMC Ships One Million 0.13-Micron Eight Inch Equivalent Wafers

Ricoh Extends Partnership with UMC to 90nm

FPGA/CPLD

Xilinx Simplifies Embedded Processing Design With New 6.3i Platform Studio

OTHER

New Board to Direct VSI Alliance

Jungo Joins the ARM Connected Community

SPONSORED BY: TEMENTO SYSTEMS

Temento Systems, innovative provider of test, debug and verify solutions for FPGA and Hardware Platforms now offer two Edition of its DiaLite On-Chip Instrumentation tool. The new HDL Fault Finder IP included into the Power Edge Edition allows accurate monitoring and display of logic events contained into your HDL code. Designers have now the possibility to insert Watchpoints and Breakpoints on the instruments and into the code, and make it run concurrently to the instrumentation.

Click here to know more about Temento

IP/SOC 2004
Grenoble, France
December 8-9, 2004

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